To manufacture the semiconductor device, a device isolation region is formed on a semiconductor substrate, a semiconductor device such as a MISFET (Metal Insulator Semiconductor Field Effect Transistor) is formed in an active region of the semiconductor substrate defined by the device isolation region, and a multilayer wiring structure is formed on the semiconductor substrate. Additionally, there is a technique using an SOI substrate as a semiconductor substrate.
Japanese Patent Application Laid-Open No. 2002-9144 (Patent Document 1), Japanese Patent Application Laid-Open No. 2004-363121 (Patent Document 2), Japanese Patent Application Laid-Open No. 2006-222329 (Patent Document 3), and Japanese Patent Application Laid-Open No. 2007-526652 (Patent Document 4) describe techniques relating to semiconductor devices having STI.